Predavanje prof. Jozepa Torelasa (University of Illinois Urbana-Champaign; Director of SRC/DARPA ACE Center for Evolvable Computing) na Matematičkom fakultetu, 22. maja 2023.

U okviru Seminara Katedre za računarstvo i informatiku prof. Josep Torrellas (University of Illinois Urbana-Champaign - UIUC; Director of the SRC/DARPA ACE Center for Evolvable Computing), održaće predavanje u ponedeljak, 22. maja 2023, u sali 718 Matematičkog fakulteta sa početkom u 18 časova.

Naslov predavanja: CLOUD COMPUTER ARCHITECTURE OF THE NEXT DECADE
 
Apstrakt:
The Cloud of the next decade will be defined by the need to process vasts waths of data for insights in a timely manner. Minimizing data movement to curtail energy consumption and increasing computation efficiency will be the overriding constraints. The compute infrastructure will be a seamless hierarchy of compute centers from edge to geo-distributed mega-datacenters. Each compute center will contain a large number of heterogeneous hardware accelerators, and tasks of unprecedentedly small granularity will ship computation to where data is. In this talk, I will describe some of the research on computer systems that my group is performing to attain this vision. We are developing programmable accelerators organized into ensembles, heterogenous memory systems, smart network interfaces and secure hardware structures. The combination of all these technique is likely to deliver large improvements in performance and energy efficiency.
 
Biografija predavača:
Josep Torrellas is the Saburo Muroga Professor of Computer Science at the University of Illinois Urbana-Champaign (UIUC). He is the Director of the SRC/DARPA ACE Center for Evolvable Computing, past Co-Leader of an Intel Strategic Research Alliance (ISRA) on Computer Security, and past Director of the Illinois-Intel Parallelism Center (I2PC). His research interests are computer architectures for shared-memory multiprocessors and parallel computing. Some of his contributions include thread-level speculation (TLS) architectures, the Bulk Multiprocessor concept, deterministic record and replay mechanisms, process variation mitigation techniques, and hardware defenses against speculative execution attacks. In addition, he has contributed to several experimental multiprocessor designs such as IBM’s PERCS Multiprocessor, Intel’s Runnemede Extreme-Scale Multiprocessor, Illinois Cedar, and Stanford DASH. He has graduated 48 PhDs, who are now leaders in academia or industry.


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